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0.8µm CMOS Analog Mixed Mode

Process Outline

  • 0.8µm P-Sub 1P2M(1-Poly and 2-Metal) Twin Well CMOS generic process.
  • Maximum operational voltage is 6V and maximum rating is 7V.
  • Transistor Characterizations are as follows;
Device Tr.type Vth[V] *1 Ids[uA/um] Ioff[pA/um]
PMOS High Vth Tr. -0.85 - -
Std. Tr. -0.65 155 0.15
Low Vth Tr. -0.35 - -
NMOS High Vth Tr. 0.80 320 0.15
Std. Tr. 0.60 370 0.17
Low Vth Tr. 0.28 - -
  • *1Extrapolated Threshold at Vg=Vd=Vcc
  • Vth tunable to match customer's needs.

Option Modules

  • Depletion Transistor.
  • 2k and 10k-ohm/sq High Resistivity Poly Resistor. (* Tunable high resistivity poly to match customer's needs.)
  • Thin Film Resistor.
  • Low temperature coefficient Poly Resistor.
  • Laser Trimming Fuse.
  • Thick Metal (3um).

Design Environment

  • BSIM3V3 based on analog oriented extraction is used for SPICE simulation.
  • SPICE parameters are ready for HSPICE, SPECTRE and Smart SPICE.
  • Characterization report is available.
  • ESD protection circuit is available.